/GoogleDrive/studyWorks/verilog/verilog_exp/clock/clock.runs/impl_1/

Name Size Modified
Go up — —
.Xil/ — —
.init_design.begin.rst 181 —
.init_design.end.rst 0 —
.opt_design.begin.rst 181 —
.opt_design.end.rst 0 —
.place_design.begin.rst 181 —
.place_design.end.rst 0 —
.route_design.begin.rst 181 —
.route_design.end.rst 0 —
.vivado.begin.rst 180 —
.vivado.end.rst 0 —
.Vivado_Implementation.queue.rst 0 —
.write_bitstream.begin.rst 181 —
.write_bitstream.end.rst 0 —
clock.bit 3825890 —
clock.tcl 4105 —
clock.vdi 19335 —
clock_1488.backup.vdi 17741 —
clock_1588.backup.vdi 13110 —
clock_1764.backup.vdi 29904 —
clock_212.backup.vdi 12991 —
clock_2388.backup.vdi 2156 —
clock_clock_utilization_routed.rpt 8700 —
clock_control_sets_placed.rpt 4152 —
clock_drc_opted.rpt 1634 —
clock_drc_routed.pb 37 —
clock_drc_routed.rpt 1634 —
clock_io_placed.rpt 78727 —
clock_opt.dcp 178109 —
clock_placed.dcp 231405 —
clock_power_routed.rpt 7650 —
clock_power_summary_routed.pb 675 —
clock_route_status.pb 44 —
clock_route_status.rpt 588 —
clock_routed.dcp 268395 —
clock_timing_summary_routed.rpt 7308 —
clock_timing_summary_routed.rpx 21652 —
clock_utilization_placed.pb 231 —
clock_utilization_placed.rpt 9150 —
gen_run.xml 4466 —
htr.txt 379 —
init_design.pb 1504 —
ISEWrap.js 4766 —
ISEWrap.sh 1622 —
opt_design.pb 5572 —
place_design.pb 14212 —
project.wdf 1838 —
route_design.pb 7464 —
rundef.js 1372 —
runme.bat 229 —
runme.log 19652 —
runme.sh 1194 —
vivado.jou 446 —
vivado.pb 129 —
vivado_1588.backup.jou 502 —
vivado_212.backup.jou 502 —
vivado_2388.backup.jou 502 —
vivado_3088.backup.jou 502 —
vivado_3384.backup.jou 502 —
write_bitstream.pb 2996 —